The NVIDIA GPU clocks group is looking for an excellent ASIC Verification engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand the clocking requirements for the chip. We also understand the physical restrictions being placed on the clocks by the backend teams. The GPU clocks group architects, designs and validates the clocks RTL. The complexity of clocks RTL has increased many fold to support our features that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

What you’ll be doing:

Develop test plans, tests and verification infrastructure for verifying high-speed Clocking logic, including many aspects: function, DFT, circuit, power, physical design constraints, and etc. You would need to comprehend the functional, test and timing modes for clocks RTL and verify the modes before RTL delivery.
You will collaborate with other verification engineers and provide creative solutions to reuse programming sequences across various verification hierarchies.
Build verification environment using SV/UVM methodology Build reusable bus functional models, monitors, checkers and scoreboards
Drive coverage driven verification closure
Work with architects, designers and post-silicon teams.
Methodology development for above tasks.

What we need to see:

BS / MS in electrical / computer engineering and related with 2+ years of ASIC verification experience.
Unit/Sub-system/SOC level verification experience
Strong programming skills in Perl/Python and C/C++, Verilog or SV.
Your proven knowledge/experience with industry standard verification tools for simulation and debug
Confirmed debugging and strong analytical skills.
Familiar with verification methodology, tools and flow.
Understand ASIC design and timing.
Validated excellent interpersonal skills.

Ways to stand out from the crowd:

Excellent analytical and problem-solving skills, experience in verification methodologies like UVM is plus.
Strong prior knowledge/experience in Clocking/Resets verification/DFT knowledge is plus.
Fluent English (both written and spoken) and excellent communication skills.
Good team work spirit, easy to cooperate with team members.

ASIC Verification Engineer