# Staff Software Development Engineer - Rust, Compilers, and GPU Systems \(3\) ## Details - **Company:** [AMD](https://hitmarker.net/companies/amd.md) - **Location:** San Jose, California, USA - **Contract type:** Full Time - **Level:** Senior \(5+ years\) - **Tags:** Software Engineering, Systems Design, Technical Engineering - **Posted:** 2026-09-01 - **Apply:** [View and apply on Hitmarker](https://hitmarker.net/jobs/amd-staff-software-development-engineer-rust-compilers-and-gpu-systems-3-4673106) ## Description **ADVANCE YOUR CAREER. ADVANCE THE WORLD.** At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. **THE ROLE:** We are building next-generation systems software for AMD GPUs with *Rust* as a core technical direction. The work spans compilers, runtimes, low-level *GPU* software, firmware, developer *tooling*, and methods for improving the safety and correctness of complex hardware-software systems. *Rust* is not incidental to this role. You will help establish how *Rust* is used in performance-sensitive and high-trust parts of the *GPU* stack, including the *compiler* and *tooling* support, system interfaces, engineering practices, and validation methods required for production deployment. You will have the opportunity to influence both near-term implementations and the longer-term architecture for using *Rust* across current and future AMD platforms. **THE PERSON:** This role is for a deeply technical *compiler* and systems generalist who enjoys working across abstraction layers. You may move between *Rust* source semantics, rustc internals, intermediate representations, *MLIR* and LLVM, target-specific code generation, object formats, runtimes, *GPU* ISA, firmware, and hardware interfaces. You should have strong judgment about correctness boundaries. Memory safety is important, but production correctness also depends on concurrency, ordering, ABI compatibility, device behavior, *compiler* transformations, and the assumptions between software and hardware. You will help make those assumptions explicit and build evidence that the resulting systems behave as intended. The ideal candidate has deep expertise in at least one part of this stack and the ability to become productive in unfamiliar areas. Experience with every technology listed below is not expected. A research background is not required, although the ability to read technical work, form testable hypotheses, and turn promising ideas into reliable implementations is valuable. The work sits at the intersection of *Rust* systems programming, production *compiler* *infrastructure*, *GPU* architecture, firmware, program *analysis*, and formal methods. Hardware-software *co-design* experience is highly valuable, especially when *compiler*, runtime, firmware, or ISA choices must evolve together. **KEY RESPONSIBILITIES:** - Lead the design and implementation of production-quality *Rust* components for low-level and performance-sensitive *GPU* systems. - Help make *Rust* a first-class engineering language across relevant parts of the *GPU* software stack, including toolchain integration, libraries, coding standards, diagnostics, testing, and deployment practices. - Design and implement *compiler* pipelines involving rustc, MIR, target-neutral intermediate representations, *MLIR* dialects and transformations, LLVM IR, and AMDGPU code generation. - Build analyses, transformations, legalization passes, and target-specific lowering for *GPU* execution models, memory spaces, synchronization, capabilities, and specialized hardware operations. - Define typed and auditable interfaces across *compiler*, host runtime, device code, firmware, and hardware boundaries. - Work on ABI definition and validation, argument layout, calling conventions, linker and loader behavior, ELF and code-object metadata, and source-to-binary identity. - Develop or improve bare-metal and no std *Rust* components where explicit state, bounded behavior, fail-closed handling, and predictable hardware effects are required. - Use testing, fuzzing, property-based testing, differential execution, executable models, and hardware validation to find semantic gaps and prevent regressions. - Apply program *analysis* or formal methods where they provide meaningful assurance, including source-level invariants, state-machine properties, refinement obligations, and clearly documented trusted boundaries. - Distinguish precisely among type-system guarantees, source-level proofs, *compiler* evidence, binary validation, simulator results, and behavior observed on hardware. - Partner with *compiler*, runtime, firmware, architecture, validation, security, and performance teams to solve problems that cross organizational and technical boundaries. - Write design documents, lead technical reviews, mentor engineers, and explain complex language, *compiler*, and hardware behavior clearly. - Evaluate emerging *compiler* and verification technologies and integrate them when they improve the safety, performance, maintainability, or development velocity of production systems. **PREFERRED EXPERIENCE:** - Strong production *Rust* experience, including ownership and borrowing, lifetimes, traits and generics, error handling, concurrency, FFI, and the careful design of safe abstractions over unsafe operations. - Experience with low-level or constrained *Rust*, including no std, embedded systems, firmware, custom targets, allocators, volatile access, interrupt handling, or architecture-specific code. - Strong C or *C++* systems programming skills and the ability to work across mixed-language codebases. - Experience with rustc internals, MIR, custom codegen backends, procedural macros, *compiler* plugins, or other *Rust* toolchain *infrastructure*. - Experience with LLVM, *MLIR*, GCC, or another production *compiler* framework. - Experience designing intermediate representations, dialects, analyses, optimization passes, legalization, instruction selection, scheduling, or target-specific code generation. - Understanding of *compiler* correctness issues such as undefined behavior, aliasing, provenance, layout, calling conventions, memory models, and source-to-target semantic preservation. - Ability to read and reason about low-level assembly, ISA encodings, *compiler* output, and machine-level execution. - Experience with linkers, loaders, ELF or other object formats, code-object metadata, DWARF, LLVM MC, disassembly, post-link *analysis*, or binary rewriting. - Understanding of *GPU* execution models, including *waves* or warps, SIMD/SIMT execution, address spaces, registers, local or shared memory, caches, synchronization, atomics, barriers, and asynchronous operations. - AMDGPU, *GCN*, RDNA, CDNA, *ROCm*, HIP, HSA, or AMDGPU LLVM backend experience. - Experience with *GPU* runtimes, drivers, firmware, embedded processors, device initialization, command processing, queueing, or hardware control paths. - Experience building secure or high-assurance systems that process untrusted inputs or operate across privilege, memory-isolation, or hardware trust boundaries. - Experience with program *analysis*, abstract interpretation, symbolic execution, model checking, SMT solvers, or formal verification tools such as Verus, Lean, Coq, Isabelle, Dafny, or TLA+. - Experience writing executable specifications, proving state-machine invariants, or validating refinement between source, IR, binaries, simulators, RTL, and hardware. - Strong validation instincts, including adversarial testing, differential testing, property-based testing, fuzzing, reproducible evidence, and careful treatment of assumptions and counterexamples. - Hardware-software *co-design* experience for ISA features, *compiler*-visible architecture, *memory systems*, synchronization, security mechanisms, or specialized compute pipelines. - Technical leadership experience: setting direction, resolving ambiguous cross-layer problems, influencing partner teams, mentoring engineers, and communicating tradeoffs clearly. **PREFERRED ACADEMIC CREDENTIALS:** Bachelor's, Master's, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent industry experience. Research publications and advanced degrees are welcome but are not required. **LOCATION:** San Jose, CA \#LI-G11 \#LI-HYBRID **This role is not eligible for visa sponsorship.** *Benefits offered are described:* [AMD benefits at a glance](https://www.amd.com/en/corporate/careers/benefits.html). *AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.* *AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available [here.](https://www.amd.com/en/legal/responsible-ai-use-policy.html)* *This posting is for an existing vacancy.*